Having qualified in the technical bid, which evaluated their capability and expertise to deliver the project as per technical requirements, the two contenders will now move on to the financial bid stage where a winner will be picked.
The project, for which Tata Semiconductor and Tower are in the race, includes identifying the upgrades needed to improve the existing 180-nanometer (nm) fabrication line of SCL. The selected company will plan how to integrate advanced equipment in the fabrication line to boost production capacity, while replacing decades-old machinery requiring frequent repair and maintenance.
The selected company will also be responsible for outlining the requirements for future installation, testing, commissioning, and supply of equipment. Long-term maintenance support will be another key responsibility in the primary component of the contract, according to the tender document.
“There are three packages of the ₹4,000-crore tender to improve the existing fabrication line. For package 1, Tata and Tower have been shortlisted and one of the two will be selected based on the financial bids,” the first official said, adding that this package accounts for a major cost of the overall tender.
“The evaluation is going on for the other two packages, which involves technology transfer and software supply for equipment automation. The selected bidders will be notified soon,” the official added.
Queries emailed to Tower Semiconductor and the ministry of electronics and information technology (MeitY) did not elicit any response till press time. Tata Electronics, the parent of Tata Semiconductor, refused to comment.
The 180-nanometer process is an old chip-making technology. It is still used to make chips for satellites, space and defense systems, medical devices, micro-controllers, power management, etc. In chip-making, nanometers measure the size of tiny parts like transistors and the spaces between them on a chip. Smaller nanometers mean smaller, faster, and more power-efficient chips.
On 3 April, Mint reported that 35 companies including the likes of TCS, HCLTech, Tower Semiconductors, and US firms such as Applied Materials, KLA Corporation, and IBM, among others, attended the pre-bid meeting for SCL Mohali to evaluate their roles in a potential ₹4,000 crore deal.
“Though 35 companies attended the meeting, around 10-12 companies actually submitted the bids,” the second official said.
Currently, Tower Semiconductor is a technology partner to SCL for the 180-nm technology and maintaining its decades-old operation. At the SCL campus, a team of Tower officials also takes care of the maintenance work for the 8-inch chip fabrication line.
An 8-inch fab line processes silicon wafers that are 8 inches (200 mm) in diameter. The size of the wafer determines how many semiconductor chips can be made from a single wafer. Today, modern fabrication facilities primarily use larger 12-inch (300 mm) wafers, which allow for more chips per wafer and improved production efficiency.
SCL currently has an installed capacity of around 500-600 WSPM (wafer starts per month). The selected bidder will also have to increase the production line capacity to 1,500 WSPM. A wafer is a thin, flat disk made of silicon (or sometimes other materials) that serves as the base for creating integrated circuits (ICs) or chips. WSPM refers to the number of semiconductor wafers that are processed or started in a semiconductor fabrication facility (fab) within one month.
The current revamp is a precursor to SCL’s strategic plan to modernise the facility with the addition of lower nodes such as 65 nm, 40 nm, and 28 nm, for which it would require a technology partner as well as extra land to add fabrication lines, the officials said.
“The government’s decision to upgrade SCL Mohali’s 180-nm line isn’t about chasing the latest node — it’s about building foundational capability, protecting national interests, enabling design-led innovation, promoting startups and academic innovations and laying the groundwork for a broader semiconductor ecosystem,” said Ashok Chandak, president of industry body India Electronics and Semiconductor Association (IESA).
According to Chandak,SCL fills ecosystem-critical and sovereignty-linked roles that commercial fabs alone cannot address. “The upgraded fab can serve as a national centre for semiconductor workforce development, hands-on training, and process technology learning—critical for scaling up India’s chip talent base,” he added.
According to IESA estimates, by 2030, India’s semiconductor demand is projected to reach $103 billion, and 10-15% of this will stem from technologies built on 180nm nodes — such as MEMS (micro-electromechanical systems), CMOS (complementary metal-oxide-semiconductor) image sensors, power semiconductors, analog, and mixed-signal devices.
Under the ₹76,000-crore India Semiconductor Mission that aims to create a strong semiconductor and display ecosystem in the country, the government had earmarked around ₹10,000 crore for modernisation of SCL. The next version of India Semiconductor Mission is also in the works with a fresh outlay to subsidize semiconductor projects.
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